Reception method including generating complex four-phase sequences for CDMA communication

ABSTRACT

A reception method including generating complex four-phase pseudo-random sequences comprising: providing a register having a plurality of bits initially set to zero; combining a predetermined value with the plurality of bits within said register to produce a bit combination; replacing the contents of the register with the bit combination; and utilizing bits from at least one predetermined location within said shift register to generate the pseudo-random sequences.

CROSS REFERENCE TO RELATED APPLICATION

[0001] This application is a continuation of application Ser. No.10/011,113, filed Nov. 13,2001; which is a continuation of applicationSer. No.09/472,348, filed Dec. 27, 1999, which issued on Jan. 8, 2002 asU.S. Pat. No. 6,337,875; which is a continuation of application Ser. No.08/956,808, filed Oct. 23, 1997, which issued on Feb. 15, 2000 as U.S.Pat. No. 6,026,117.

BACKGROUND OF THE INVENTION

[0002] 1. Field of the Invention

[0003] The present invention generally relates to an improved sequencedesign for code-division multiple access (CDMA) communications. Moreparticularly, the invention is directed to generating complex four-phasepseudo-random code sequences which may be directly mapped to aquadrature phase shift keying (QPSK) signal constellation.

[0004] 2. Description of the Prior Art

[0005] Code-division multiple access (CDMA) is a type of spread spectrumcommunication system wherein each subscriber unit is distinguished fromall other subscriber units by the possession of a unique code. In orderto communicate with a particular subscriber unit, a transmitting unitimprints the unique code upon a transmission and the receiving unit usesthe code to decode the transmission. CDMA communication systems transmitvoice and data information using signals that appear noiselike andrandom. Since the random sequences are generated by standarddeterministic logic elements, the generation of the bit sequences arepredictable and repeatable. It is the use of these repeatable binaryrandom sequences that permits easy modulation of any information-bearingdigital signal for data communications. These predictable randomsequences are called pseudo-random sequences.

[0006] Each subscriber unit in a CDMA communication system receives aplurality of pseudo-random sequences from base stations which are withinthe communicating range of the subscriber unit. As indicated above, thereceiving unit uses a particular pseudo-random code to attempt to decodeone of the received pseudo-random sequences. The particular code canonly be used to decode one pseudo-random sequence, the other receivedpseudo-random sequences contribute to noise.

[0007] As the correlation between the pseudo-random sequences used bythe CDMA communication system decreases, the amount of noise output bythe receiving unit also decreases. This decrease can be explained asfollows: There is a high correlation between the one pseudo-randomsequence including the data to be transmitted to the subscriber unit andthe pseudo-random sequence generated by the receiver. As the correlationbetween the one pseudo-random sequence and the other pseudo-randomsequences decreases (i.e. cross correlation), it becomes easier for thesubscriber unit to recognize its particular pseudo-random sequence andfilter out all of the other pseudo-random sequences. Thus, noise isreduced and signal clarity enhanced.

[0008] There is a need for an improved pseudo-random sequence generatorwhich generates sequences having improved cross correlation propertiesto reduce the noise experienced by the receiver. There is also a needfor a pseudo-random code generator that is easy to implement.

SUMMARY OF THE INVENTION

[0009] The present invention provides an improved method and apparatusfor generating complex four-phase pseudo-random code sequences, whichcan easily be mapped to a QPSK signal constellation and which have a lowcross correlation and low out-of-phase autocorrelation.

[0010] In one embodiment, a pseudo-random code generator producescomplex four-phase CDMA codes utilizing an accumulator and a pluralityof flip flops. The accumulator receives a quotient of a parameter Mdivided by a parameter N and receives feedback from the plurality offlip flops. The parameter M and N are integers, wherein M is relativelyprime to N. The accumulator combines the quotient with the data receivedfrom the flip flops and transmits the combined data to the flip flops.Two bits are extracted and used to produce I and Q codes.

[0011] In another embodiment, a pseudo-random code generator producescomplex four-phase CDMA codes by providing a circuit for outputting anarithmetic progression of values and an incremental value of thearithmetic progression of values. The pseudo-random code generator alsocontains a first mixer for receiving the arithmetic progression ofvalues and the incremental values. A second mixer receives the output ofthe first mixer and combines this output with the quotient of aparameter 2M divided by parameter N, wherein M and N are integers and Mis relatively prime to N. Two bits are extracted from the second mixerand are converted into I and Q codes.

[0012] Other advantages will become apparent to those skilled in the artafter reading the detailed description of the preferred embodiments.

BRIEF DESCRIPTION OF THE DRAWING

[0013]FIG. 1 is a block diagram of a spread spectrum transmitter of thepresent invention;

[0014]FIG. 2 is a block diagram of a spread spectrum receiver of thepresent invention;

[0015]FIG. 3 is a timing diagram of a conventional pseudo-random codesequence;

[0016]FIG. 4 is a first embodiment of a spread spectrum code generatorfor generating four-phase sequences according to the present invention;

[0017]FIG. 5 is a diagram showing the conversion to I and Q in the firstembodiment of the spread spectrum code generator;

[0018]FIG. 6 is a diagram showing the method steps for generatingfour-phase sequences according to the first embodiment of the presentinvention;

[0019]FIG. 7 is a second embodiment of a spread spectrum code generatorfor generating four-phase sequences according to the present invention;

[0020]FIG. 8 is a diagram showing the conversion to I and Q in thesecond embodiment of the spread spectrum code generator;

[0021]FIG. 9 is a diagram showing the method steps for generatingfour-phase sequences according to the second embodiment of the presentinvention;

[0022]FIG. 10 is a graph of an example of an autocorrelation functionfor the first suboptimum implementation.

[0023]FIG. 11 is an example of a crosscorrelation function for the firstsuboptimum implementation.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0024] The preferred embodiments are described with reference to drawingfigures wherein like numerals represent like elements throughout.

[0025] A spread spectrum transmitter 10, as shown in FIG. 1, includes ananalog-to-digital (A/D) converter 12 for receiving a voice signal. Aswitch 14 receives both the digital voice signal from the A/D converter12 and a digital data signal from a terminal (not shown). The switch 14connects the spread spectrum transmitter 10 with an input for eitherdigital voice signal or digital data. The digital voice signal anddigital data are hereafter collectively referred to as digital data. Theswitch 14 directs the digital data to a spreader 20, which may comprisea mixer. A pseudo-random sequence generated by code generator 30 isapplied to the spreader 20. The code generator 30 and the spreader 20are shown as being contained within spread spectrum encoder 40.

[0026] The spreader 20 performs a frequency spectrum spreading functionby multiplying the digital data by the pseudo-random sequence in thetime domain, which is equivalent to convolving the bimodal spectrum ofthe digital data with the approximately rectangular spectrum of thepseudo-random sequence in the frequency domain. The output of thespreader 20 is applied to a low-pass filter 50, whose cutoff frequencyis equal to the system chip rate, F_(cr). The output of the low-passfilter 50 is then applied to one terminal of a mixer 60 and upconverted,as determined by the carrier frequency F_(c), which is applied to itsother terminal. The upconverted signal is then passed through aband-pass filter 70, which may be a helical resonator. The filter 70 hasa bandwidth equal to twice the chip rate and a center frequency equal tothe center frequency of the bandwidth of the spread spectrum system. Theoutput of the filter 70 is applied to the input of an RF amplifier 80,whose output drives an antenna 90.

[0027] A spread spectrum receiver 100 is shown in FIG. 2. An antenna 110receives the transmitted spread spectrum signal, which is filtered by abandpass filter 120. The filter has a bandwidth equal to twice the chiprate F_(cr), and a center frequency equal to the center frequency of thebandwidth of the spread spectrum system. The output of the filter 120 issubsequently downconverted by a mixer 130, possibly in two stages, to abaseband signal using a local oscillator having a constant frequencywhich is approximately the same as the carrier frequency F_(c), of thetransmitter 10. The output of the mixer 130 is then despread by applyingit to a first terminal of the despreader 140 while applying the samepseudo-random sequence as delivered to the spreader 20 to a secondterminal of the despreader 140. The pseudo-random sequence is generatedby a code generator 30. The despreader 140 and the code generator 30 arecontained within a spread spectrum decoder 160 as shown in FIG. 2. Theoutput of the despreader 140 is applied to a low pass filter 180, whichhas a cutoff frequency at the data rate of the data input to the spreadspectrum transmitter 10. The output of the low-pass filter 180 is areplica of the data input to FIG. 1.

[0028] It should be appreciated by those of skill in the art that thepseudo-random sequence used in the receiver 100 of a spread spectrumcommunication system must be synchronized with the pseudo-randomsequence used in the transmitter 10. Methods for achieving thissynchronization are also well known.

[0029] A conventional spreading sequence is a pseudo-random digitalsequence as shown in FIG. 3. The sequence is used to spread the signalbeing transmitted and to despread the signal being received. Twodifferent binary codes using two different LFSR circuits provide I and Qchannels for transmission of data. However, if there is highcross-correlation between the I and Q channels at the receiver side, agreat deal of noise will be output by the receiver.

[0030] The code generator 30 of the present invention generatespseudo-random code sequences with greatly enhanced cross-correlationproperties compared with the prior art pseudo-random sequences such asthe one shown in FIG. 3. A prior art pseudo-random sequence essentiallycomprises a signal having different frequency components. This signal isa combination of sinusoidal waveforms having different frequencies; bothhigh frequency sinusoidal waveforms and low frequency sinusoidalwaveforms. Thus, the signal has a frequency spectrum which can bedivided into frequency regions. Those sinusoids having strongerfrequencies (higher amplitudes) will be more dominant in the signal thanthose sinusoids having weaker frequencies (lower amplitudes). However,in order to generate an enhanced pseudo-random code (highly random code)as in the present invention, the strength or amplitude in each frequencyregion should be the same. Highly random codes have the property thatthey contain components in all frequency regions, resulting in a flatspectrum. The code generator 30 generates a pseudo-random sequencewherein the amplitude of the sinusoids in all frequency regions isapproximately the same (flat) as will be explained in detail below.

[0031] A pseudo-random sequence having a length N and frequency regionsX can be represented by Y frequency bins of a discrete Fourier seriesrepresentation, wherein each bin corresponds to a frequency region.There are Y bins for the X frequency regions 2π/T)k, k=0 , . . . , N-1where T is the period of the spreading sequence in time and X=Y=N. Theinstantaneous frequency of the sequence should ideally spend equal timein each of the X frequency regions. Therefore, each frequency region orbin will have the same strength. For example, let s(t) denote thespreading sequence which is periodic. Then $\begin{matrix}{{s(t)} = {\sum\limits_{k}{c_{k}^{{j2\pi}\quad k\quad {t/T}}}}} & {{Equation}\quad (1)}\end{matrix}$

[0032] is the Fourier Series representation where $\begin{matrix}{c_{k} = {\frac{1}{T}{\int_{T}{{s(t)}^{{- {j2\pi}}\quad k\quad {t/T}}{t}}}}} & {{Equation}\quad (2)}\end{matrix}$

[0033] where C_(k) is the strength of the sinusoids at one of thediscrete Fourier series representations or the strength of the sinusoidsin the region or bin. The average power in s(t) is written as follows:$\begin{matrix}{P = {\sum\limits_{k}| c_{k} |^{2}}} & {{Equation}\quad (3)}\end{matrix}$

[0034] The magnitude spectrum of s(t) is |C_(k)| and power spectrum is|C_(k)|². The ideal power spectrum is flat, where the average power isdistributed over all frequency bins equally. This results in a narrowautocorrelation. All of the |C_(k)|² should be equal. To obtain this,the instantaneous frequency is: $\begin{matrix}{{\frac{2\pi}{T}M\quad k},{k = 0},\ldots \quad,{N - 1}} & {{Equation}\quad (4)}\end{matrix}$

[0035] where M and N are integers and M is relatively prime to N (M andN do not have the same common factor). This guarantees that eachfrequency bin (2π/T)k is visited equally. For example, if N=7 and M=3,the instantaneous frequency is then $\begin{matrix}{0,{\frac{2\pi}{T} \times 3},{\frac{2\pi}{T} \times 6},\ldots \quad,{\frac{2\pi}{T} \times 18}} & {{Equation}\quad (5)}\end{matrix}$

[0036] Since a discontinuity in the phase has the effect of spreadingthe power into other frequency bins, the phase is preferably continuousand free of sudden bumps as much as possible.

[0037] The primary constraint is that the phase of the complex spreadingsequence should be limited to {0π/2, π, 3π/2}. This limitation leads tosudden phase changes and prevents the power spectrum from becomingcompletely flat. However, a sequence with relatively flat power spectraldensity can be obtained. For the phase to be continuous at t=(k/N)T, therecursive equation is $\begin{matrix}{{\Theta_{k - 1} - \Theta_{k}} = {\frac{2\pi}{N}M\quad k}} & {{Equation}\quad (6)}\end{matrix}$

[0038] where Θ is the phase of individual chips in a sequence and k isthe index (order) of the chips in the sequence. If Θ₀ is arbitrarilychosen as one of (0, π/2, π, 3π2), then Θ₁, Θ₂, . . . , Θ_(n) can begenerated sequentially. This solution results in flat spectra, which isthe optimum solution. The choice of Θ₀ (0, π/2, π, 3π/2) makes nodifference because a constant phase offset over the sequence does notchange its spectral properties.

[0039] The suboptimum implementation of the above equation when Θ_(k) islimited to {0, π/2, π, 3π/2} is as follows: $\begin{matrix}{{\Theta_{k - 1} - \Theta_{k}} = {\frac{\pi}{2}( {\lfloor {4\frac{M}{N}k} \rfloor {{mod}4}} )}} & {{Equation}\quad (7)}\end{matrix}$

[0040] where └4(M/N)k┘ means the largest integer less than or equal to4(M/N)k. This equation is a modified version of Equation (6) and itperforms the mapping of phase angles to one of four points for easy QPSKimplementation. It limits the phases to the set {0, π/2, π, 3π/2}.

[0041] Continuing the sequential phase deviation to develop a secondsuboptimum implementation, one has: $\begin{matrix}{{\Theta_{k} = {\Theta_{k - 1} - {\frac{2\pi}{T}M\frac{k}{N}T}}}{\Theta_{k} = {\Theta_{k - 2} - {\frac{2\pi}{T}M\frac{k - 1}{N}T} - {\frac{2\pi}{T}M\frac{k}{N}T}}}\vdots {\Theta_{k} = {{\Theta_{0} - {\frac{2\pi}{T}M\frac{T}{N}{\sum\limits_{i = 1}^{k}i}}} = {\Theta_{0} - {\frac{2\pi}{T}M\frac{T}{N}\frac{k( {k + 1} )}{2}}}}}} & {{Equation}\quad (8)} \\{\Theta_{k} = {\Theta_{0} - {\pi \frac{M}{N}{k( {k + 1} )}}}} & {{Equation}\quad (9)}\end{matrix}$

[0042] Again, the second suboptimum implementation with four phases (0,π/2, π, 3π/2) is obtained as: $\begin{matrix}{{\Theta_{k} = {\Theta_{0} - {\frac{\pi}{2}( {\lfloor {2\frac{M}{N}{k( {k + 1} )}} \rfloor {{mod}4}} )}}}{{{{If}\quad \Theta_{0}} = 0},{{then}:}}} & {{Equation}\quad (10)} \\{\Theta_{k} = {\frac{\pi}{2}\lfloor {2\frac{M}{N}{k( {k + 1} )}} \rfloor {{mod}4}}} & {{Equation}\quad (11)}\end{matrix}$

[0043] for this second suboptimum implementation.

[0044] Examining Equation 6 one sees that each phase term can beobtained by adding a variable term (2 π/N)(Mk) to the previous phase.Furthermore, since 2πk is equal to zero modulo 2π, the term one needs toadd each phase to find the next phase reduces to (M/N), which is not aninteger. Therefore, a possible implementation can be a recursive adder(accumulator) which adds the term (M/N) to the phase in each iteration.

[0045]FIG. 4 shows a first embodiment of the code generator 30 forgenerating four-phase pseudo-random code sequences which greatly improveautocorrelation properties and cross correlation properties. The firstembodiment is an example of the first suboptimum implementation ofEquation 7. Although four-phase sequences of any length can begenerated, a length of 127 bits is selected as an example. Further, forthe purposes of this example, there are N number of chips in a symbol,which represents the processing gain. A number M is selected to berelatively prime to N, which means that M and N do not have a commonfactor. The number of bits L required to provide a binary representationof the processing gain N is determined by solving the followingequation:

N≦2^(L).   Equation (12)

[0046] The code generator 30 includes an accumulator 31 which is 2L bitsin length. Since N=127 in this example, L=8. Therefore, accumulator 31has a length of 16 bits. An eight bit number M/N is applied to one inputof the accumulator 31. A sixteen bit number from flip flops 32 ₁ through32 _(2L) is applied to a second input for the accumulator 31. Flip flops32 ₁ through 32 _(2L) may be replaced by a shift register. Although bitsare input to flip flops 32 ₁-32 _(2L) and to accumulator 31 in parallel,the bits could also be input in series. The sum of the two numbers inputinto the accumulator 31 is transmitted to flip flops 32 ₁ through 32_(2L). An extractor 33 extracts the fifth and sixth least significantbits from the flip flops 32, through 32 _(2L) (FIG. 5). The fifth andsixth least significant bits are applied to an exclusive—or gate 34.

[0047] The output of the exclusive—or gate 34 is converted to a Q valueby a converter 36. The sixth bit output from extractor 33 is convertedto an I value by converter 35. The I and Q values output from converters35 and 36 are applied to spreader 20 or despreader 140. As indicatedbefore, M/N is an eight bit number in this example. The fifth and sixthbits of the accumulator output represent the first two significant bitsof 4 (M/N) which appears in Equation (7). When 4 (M/N) is mapped to oneof four values {0, 1, 2, 3} by taking modulo 4, the result is the firsttwo significant bits of 4(M/N), or equivalently fifth and sixth bits ofthe accumulator.

[0048]FIG. 6 is a flow diagram of the method performed by the circuitshown in FIG. 4 The initial parameters M and N are loaded into registersor memory (not shown) before performing the dividing function (M dividedby N). In addition, the value in accumulator 31 is preferably equal tozero. The remaining apparatus in the code generator 30 is alsoinitialized (S1). The sum, which initially is zero, is added to thequotient of M/N (S2). The fifth and sixth bits of the new sum areextracted (S3) in order to be converted into the I and Q values (S4 andS5). The bits (L-2) and (L-3) should be mapped to QPSK constellation asfollows:

[0049] 00→11

[0050] 01→1-1

[0051] 10→−1-1

[0052] 11→−11

[0053] This mapping can be done in software or hardware by using first:(L-2) (L-3) (L-2) (L-2)⊕(L-3) 0 0 → 0 0 0 1 → 0 1 1 0 → 1 1 1 1 → 1 0

[0054] and then using the standard 0→1, 1→−1 mapping.

[0055] For example, if the sixth bit for L-2 bit is equal to zero, thenthe I value is one. If the sixth bit a one, then the I value is negativeone. In the case of the Q value, if the output of exclusive—or gate 34is a zero, the Q value is one. If the output of exclusive—or gate 34 isa one is negative one. The I and Q values are output to the spreader 20or despreader 140 (S6). Method steps S2 through S6 are repeated untilall the digital data supplied by switch 14 is transmitted or all thedata is received by switch 190.

[0056]FIG. 7 shows a second embodiment of the code generator 200. Codegenerator 200 is substituted for code generator 30 and generatesfour-phase pseudo-random code sequences similar to those generated bythe code generator 200 which greatly improve auto correlation propertiesand cross correlation properties. The second embodiment is an example ofthe second suboptimum implementation of Equation (11). Althoughfour-phase sequences of any length can be generated, a length of 127bits is selected as an example. Further, for the purposes of thisexample, there are N number of chips in a symbol, which represents theprocessing gain. A number M is selected to be relatively prime to N. Thenumber of bits L required to provide a binary representation ofprocessing gain N is determined by solving Equation (12). Since M=127 inthis example, L=8. Therefore (M/N) is sixteen bits in length.

[0057] The code generator 30 includes an accumulator 210 which is L bitsin length. Accumulator 210 has a length of 8 bits. A “1” is preferablyapplied to one input of accumulator 210. The number from flip flops 220₁ through 220 _(L) is applied to a second input of the accumulator 210.Flip flops 220 ₁ through 220 _(L) may be replaced by a shift register.Although bits are input to flip flops 220 ₁ through 220 _(L) andaccumulator 210 in parallel, the bits could be input in series. The sumof the two numbers input into the accumulator 210 is transmitted to flipflops 220 ₁ through 220 _(L). The output of flip flops 220 ₁ through 220_(L) are transmitted to flip flops 230 ₁ through ²³⁰ _(L) as well asmixer 240. The mixer 240 also receives the output of flip flops 230 ₁through 230 _(L). The accumulator 210 and flip flops 220 ₁-220 _(L),flip flops 230 ₁-230 _(L), and mixer 240 provide a flip flop feedbackcircuit. The output of mixer 240 is input to mixer 250. Mixer 250 alsoreceives an 8 bit input from (M/N). The extractor 260 extracts the fifthand sixth least significant bits from the mixer 250. The sixth leastsignificant bit output from extractor 260 is converted to an I value byconverter 280. The fifth and sixth least significant bits are applied toan exclusive—or gate 270. The output of the exclusive—or gate 270 isconverted to a Q value by a converter 290 as shown in FIG. 8. The I andQ values output from converters 280 and 290 are applied to spreader 20or despreader 140. As indicated before, (M/N) is an eight bit number inthis example. Flip flops 220 ₁ through 220 ₁ output the k value and flipflops 230 ₁ through 230 _(L) output the k+1 value to the mixer 240. Themixer 250 receives the output of mixer 240 and the product of (M/N).When 2(M/N)k(k+1) is mapped to one of the four values {0, 1, 2, 3 } bytaking modulo 4, the result is the fifth and sixth bits from extractor260 (FIG. 8).

[0058]FIG. 9 is a flow diagram of the method performed by the circuitshown in FIG. 7. The initial parameters M and N are loaded intoregisters or memory (not shown) before performing the dividing function(M/N). In addition, the value k is preferably equal to zero. Theremaining apparatus in the second embodiment of the code generator 200is also initialized (S1). The value of (M/N)k(k+1) is calculated (S2).The fifth and sixth bits resulting from the above calculation areextracted (S3) in order to be converted into I and Q values (S4 and S5).The bits (L-2) and (L-3) should be mapped to QPSK constellation asfollows:

[0059] 00→11

[0060] 01→1-1

[0061] 10→−1-1

[0062] 11→31 11

[0063] This mapping can be done in software or hardware by using first:(L-2) (L-3) (L-2) (L-2)⊕(L-3) 0 0 → 0 0 0 1 → 0 1 1 0 → 1 1 1 1 → 1 0

[0064] and then using the standard 0→1, 1→−1 mapping.

[0065] For example ,if the sixth bit for L-2 is equal to zero, then theI value is 1. If the sixth bit is a 1 then I value is −1. In the case ofthe Q value, if the output of the exclusive—or gate 270 is a zero the Qvalue is 1. If the output of the exclusive—or gate 270 is a 1 the I andQ values are output to the spreader 20 or the despreader 140 (S6). The Kvalue is incremented. Method steps S2 through S7 are repeated into allthe digital data supplied by switch 14 is transmitted where all the datais received by switch 190.

[0066]FIG. 10 shows an auto correlation function where N=127 and M=44,which is the result of using the first suboptimum implementation togenerate the pseudo-random code

[0067]FIG. 11 shows a cross correlation function where N=127 and M=44,which is the result of using the first suboptimum implementation togenerate the pseudo-random code

[0068] The autocorrelation a(n) for the sequence s(k) is given as:$\begin{matrix}{{a(n)} = {\sum\limits_{k = 1}^{N}{{s(k)}s*( {k + n} )}}} & {{Equation}\quad (13)}\end{matrix}$

[0069] where the indexes in parentheses are taken modulo N, and thecrosscorrelation c(n) of two sequences s(k) and r(k) is given as:$\begin{matrix}{{c(n)} = {\sum\limits_{k = 1}^{N}\quad {{s(k)}r*( {k + n} )}}} & {{Equation}\quad (14)}\end{matrix}$

[0070] where again the index is taken modulo N. The first suboptimumimplementation achieves the desirable result of making the magnitude ofthe crosscorrelation and autocorrelation (except for a(0)) smallcompared to N. Although the results of the example of the secondsuboptimum implementation are not shown, the results are similar.Equations 13 and 14 are well known to one having ordinary skill in theart.

[0071] Although the invention has been described in part by makingdetailed reference to certain specific embodiments, such detail isintended to be instructive rather than restrictive. It will beappreciated by those skilled in the art that many variations may be madein a structure and mode of operation without departing from the spiritand scope of the invention as disclosed in the teachings herein.

What is claimed is:
 1. A reception method including generating a complexfour-phase pseudo-random sequence having I and Q portions comprising:(a) providing a register having a plurality of bits initially set tozero; (b) having a predetermined value comprising a plurality of bits;(c) combining said predetermined value with said plurality of bitswithin said register to produce a bit combination; (d) replacing thecontents of the register with the bit combination; (e) utilizing the bitfrom a first predetermined location within said shift register togenerate said I portion; (f) utilizing the bit from a secondpredetermined location within said shift register to generate said Qportion; (g) repeating steps (c), (d), (e) and (f).
 2. The receptionmethod of claim 1, whereby said predetermined value is a quotient of aparameter M divided by a parameter N, wherein M and N are integers and Mis relatively prime to N.
 3. The reception method of claim 2, wherebysaid combining step is performed by adding the quotient of M/N and thecontents of the register.
 4. A method for despreading voice or datasignals for reception of a code division multiple access (CDMA)communication including generating four-phase pseudo-random sequences,the method comprising: (a) selecting a parameter M and a processing gainN wherein M and N are integers and M is relatively prime to N; (b)dividing the parameter M by the processing gain N to provide a quotient;(c) mixing the quotient with an arithmetic progression of values and anincremental value of said arithmetic progression of values to provide aresult; (d) extracting first and second bits from the result; (e)generating I and Q data from the extracted first and second bitsrespectively; (f) using the I and Q data to despread said voice or datasignals; and (g) repeating steps (c) through (f).
 5. A reception methodfor generating complex four-phase code division multiple access (CDMA)codes utilized for despreading a spread voice or data signalscomprising: (a) providing a register having a plurality of bits; (b)selecting a first parameter M and a second parameter N, wherein M and Nare integers and M is relatively prime to N; (c) creating a quotientM/N; (d) combining the quotient M/N with the contents of the register toproduce a bit combination, (e) replacing the contents of the registerwith the bit combination; (f) extracting first and second bits from theregister; (g) generating I and Q codes from the first and secondextracted bits; (h) outputting the I and Q codes for reception; and (I)repeating steps (d) through (h).
 6. The transmission method of claim 5wherein the register has sixteen bits of progressively moresignificance.
 7. The transmission method of claim 5, wherein saidcombining is performed by adding the quotient of M/N and the content ofthe register.
 8. The transmission method of claim 5, further comprisingoutputting said I and Q codes to a despreader to despread said spreadvoice or data signals.
 9. A reception method for generating four-phasecode division multiple access (CDMA) codes used for despreading spreadvoice or data signals, the reception method comprising: (a) receivingspread voice or data signals; (b) selecting a parameter M and aprocessing gain N wherein M and N are integers and M is relatively primeto N; (c) dividing M by N to provide a quotient; (d) mixing the quotientwith a series of values and an incremental value of said series ofvalues to provide a result; (e) extracting first and second bits fromthe result; (f) generating I and Q data from the extracted first andsecond bits, respectively; (g) outputting the I and Q data to aspreader; and (h) despreading said voice or data signals.
 10. Thereception method of claim 9, wherein said series of values comprises anarithmetic progression.
 11. A reception method for receiving an RFsignal having a spread voice or data signal, the reception methodincluding generating complex four-phase pseudo-random sequences andusing said sequences to despread said spread voice or data signalsubsequent to RF downconversion the reception method comprising: (a)providing a register having a plurality of bits initially set to zero;(b) selecting a first parameter M and a second parameter N to create aquotient M/N, wherein M and N are integers and M is relatively prime toN; (c) combining the quotient M/N with the content of the register toproduce a bit combination; (d) replacing the content of the registerwith the bit combination; and (e) repeating steps (c) and (d).
 12. Thereception method of claim 11 wherein the register has progressively moresignificance, and further including the step of extracting several bitsfrom the combination.
 13. The reception method as in claim 11, whereinthe step of combining is performed by adding.
 14. A wireless receptionmethod for generating four-phase pseudo-random sequences, and utilizingthe sequences for despreading spread voice or data signals comprising:(a) receiving spread voice or data signals; (b) selecting a parameter Mand a processing gain N, wherein M and N are integers and M isrelatively prime to N; (c) dividing the parameter M by the processinggain N to provide a quotient; (d) mixing the quotient with an arithmeticprogression of values and an incremental value of said arithmeticprogression of values to provide a result; (e) extracting first andsecond bits from the result; (f) generating I and Q data from theextracted first and second bits; (g) outputting the I and Q data to adespreader; (h) despreading said voice or data signals with said I and Qdata; (I) repeating steps (d) through (h).
 15. The reception method ofclaim 14, wherein the first bit is the fifth least significant bit insaid result, and wherein the second bit is the sixth least significantbit in said result.